
4.2.2 INTERRUPT-ON-CHANGE
Each of the PORTA pins is individually configurable as
an interrupt-on-change pin. Control bits IOCAx enable
or disable the interrupt function for each pin. Refer to
Register 4-4. The interrupt-on-change is disabled on a
Power-on Reset.
For enabled interrupt-on-change pins, the values are
compared with the old value latched on the last read of
PORTA. The ‘mismatch’ outputs of the last read are
OR’d together to set the PORTA Change Interrupt Flag
bit (RABIF) in the INTCON register (Register 2-3).
This interrupt can wake the device from Sleep. The
user, in the Interrupt Service Routine, clears the
interrupt by:
a) Any read or write of PORTA. This will end the
mismatch condition, then,
b) Clear the flag bit RABIF.
A mismatch condition will continue to set flag bit RABIF.
Reading PORTA will end the mismatch condition and
allow flag bit RABIF to be cleared. The latch holding the
last read value is not affected by a MCLR nor BOR
Reset. After these Resets, the RABIF flag will continue
to be set if a mismatch is present.
REGISTER 4-4: IOCA – INTERRUPT-ON-CHANGE PORTA REGISTER (ADDRESS: 96h)
Note: If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RABIF
interrupt flag may not get set

////////////////////////////////////////////////////////////////// INT
// Interrupt Functions: ENABLE_INTERRUPTS(), DISABLE_INTERRUPTS(),
// EXT_INT_EDGE()
//
// Constants used in EXT_INT_EDGE() are:
#define L_TO_H 0x40
#define H_TO_L 0
// Constants used in ENABLE/DISABLE_INTERRUPTS() are:
#define GLOBAL 0x0BC0
#define INT_RTCC 0x0B20
#define INT_RB 0x1FF0B08
#define INT_EXT 0x0B10
#define INT_AD 0x8C40
#define INT_TBE 0x8C10
#define INT_RDA 0x8C20
#define INT_TIMER1 0x8C01
#define INT_TIMER2 0x8C02
#define INT_CCP1 0x8C04
#define INT_SSP 0x8C08
#define INT_EEPROM 0x8D10
#define INT_TIMER0 0x0B20
#define INT_RA 0xFF0B08
#define INT_OSC_FAIL 0x8D80
#define INT_COMP 0x8D20
#define INT_COMP2 0x8D40
#define INT_RA0 0x010B08
#define INT_RA1 0x020B08
#define INT_RA2 0x040B08
#define INT_RA3 0x080B08
#define INT_RA4 0x100B08
#define INT_RA5 0x200B08
#define INT_RB4 0x1100B08
#define INT_RB5 0x1200B08
#define INT_RB6 0x1400B08
#define INT_RB7 0x1800B08





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